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ewd-900-hdtc e mbedding the wireless future.. 128 channel, half-duplex 868/915 m h z 76.8 kbit/sec fsk data transceive r typical applications features description summary electrical specifications ? a sset tracking ? wireless sensors ? home automation ? remote control ? automated meter reading ? remote data ac quis i tion ? building automation ? 500+ feet of range (outdoors line-of-sight) ? 3v very low-power operation ? .3 to 76.8 kbit/second data rate ? no special encoding required to use with uart ? small dip form-factor - .7? x .7? x .15? ? unlicensed operation in the us and uk ? factory set 32-bit unique id is perfect for network applications ? very low cost in large volumes ? development tools including api source code available patent pending the ewd-900-fdtc is a fully integrated half duplex wireless fsk data transceiver. the basic design of the transceiver is frequency-scaleable from 300mhz to 1ghz, allowing operation in countries around the world. the transceiver can operate on 128 channels in the 902-928mhz unlicensed band. it contains built in data encoding and decoding, simplifying the interface and software of the host processo r. a typical circuit will consist of a low-cost microcontroller, a power source, and an antenna. the transceiver requires no external rf components with the exception of a 50-ohm antenna. preliminary t a =25 c parameter m i n . t y p . m a x . units operating frequency - us 902 915 928 mhz channels ? us operation 128 operating frequency ? uk 868 870 mhz channels ? uk operation 20 tx output pow e r 0 5 dbm rx sensitiv ity ( 900mhz) 600 baud manchester - 9 7 . 6 d b m rx sensitiv ity ( 868mhz) 600 baud manchester - 1 0 0 . 6 d b m o p e r a t i n g v o l t a g e 2 . 7 3 . 0 3 . 3 v d c operating current-tx 0dbm 16 ma operating current-tx 4dbm 24 ma o p e r a t i n g c u r r e n t - r x 9 . 8 m a data rate 0.6 76.8 kbit/sec tx-rx sw itch time 150 usec - i -
document control created by st eve m ont gom ery 10/ 30/ 02 engineering review marketing review approved - engineering approved - marketing revision history revision author date description 1 . 0 s j m 1 0 / 3 0 / 0 1 docum e nt c r e a t e d 1.1 sjm 11/18/02 module pin-out diagram and table corrected - ii -
table of contents typical app lications ............................................................................................ i summary electrical specificat ions .................................................................... i featur es ................................................................................................................ i descripti on ........................................................................................................... i document c ontrol ............................................................................................... ii revision hi story .................................................................................................. ii table of figures ................................................................................................. iii pin out di agram .................................................................................................. 1 pin descrip tion.................................................................................................... 1 m e chanical drawing ........................................................................................... 2 absolute m a xi mum rati ngs ............................................................................... 2 detailed electrical specificat ion s ...................................................................... 2 ac specifications ? rx .................................................................................................. 2 ac specifications ? tx .................................................................................................. 3 ac specifications ? system ti m i ng ............................................................................... 4 dc specifications ........................................................................................................... 4 circuit descr iption .............................................................................................. 5 example applicat ion circuit .............................................................................. 7 related docume ntation ...................................................................................... 8 ordering info rmatio n .......................................................................................... 8 - ii -
table of figures figure 1: mechanical dr awing of ewd-hdtc ................................................................. 2 figure 2 e w d-hdtc internal block diagram .................................................................. 5 - iii -
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet pin out diagram pin description pin no. pin name description 1 v c c p o w e r s u p p l y 2 edat eeprom data line ? i2c interfac e 3 eclk eeprom cloc k line ? i2c interfac e 4 g n d g r o u n d 5 g n d g r o u n d 6 ant 50-ohm antenna port 7 g n d g r o u n d 8 rssi analog rssi output 9 pale programming interface ale 10 pdat programming interface data input/output 11 pclk programming interface clock input 12 dclk data interface clock 13 dio data interface input/output 1 4 g n d g r o u n d c:\radiotronix\data sheets\ewd-hdtc.doc - 1 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet m echanical drawing figure 1: mechanical drawing of ew d-hdtc absolute m aximum ratings parameter min max units vcc ? power supply -0.3 5.0 vdc voltage on any pin -0.3 vcc+.3, 5.0 max vdc input rf level 10 dbm storage temperature -50 150 c operating temperature 0 70 c detailed electrical specifications ac specifications ? rx parameter min ty p. max units notes receive frequency - us 902.2 927.8 m hz at antenna pin channels - us 128 input frequency - uk 868 870 mhz at antenna pin channels - us 20 channel spacing ? us 200 khz channel spacing - uk 100 khz receiver sensitivity -97.6 -93 dbm 900 mhz 600 baud manchester receiver sensitivity -100.6 -93 dbm 868 mhz 600 baud manchester receiver noise bandwidth 30 khz cascaded noise figure 13 dbm c:\radiotronix\data sheets\ewd-hdtc.doc - 2 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet maximum input power 10 dbm 2.4kbaud manchester encoded data, ber=10 -3 input ip3 -18 dbm 2.4kbaud manchester encoded data, ber=10 -3 input impedance 50 ohms no matching required lo leakage -57 dbm 50-ohm termination at ant adjacent channel rejection tdb40 dbc dbc fc +/-200khz intermediate frequency (if) 150 khz if bandwidth 175 khz rssi dynamic range -105 -50 dbm rs s i a ccuracy ac specifications ? tx parameter min ty p. max units notes transmit frequency -us 902.2 927.8 mhz channels - us 128 channel spacing - us 200 khz transmit frequency -uk 868 870 mhz channels - uk 20 channel spacing - uk 100 khz center frequency error 5 10 ppm 915 mhz, 25 c:\radiotronix\data sheets\ewd-hdtc.doc - 3 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet output i m p e d a n c e 5 0 o h m s carrier phase noise -85 dbc into 50 ohm load harmonic output -20 -40 dbc dbc into 50 ohm load ac specifications ? sy stem timing parameter min ty p. max units notes turn-on time - tx tbd msec turn-on time ? rx tbd msec wake-up time tbd usec wake-up from sleep tx ->rx swit ch t i me tb d us ec rx ->tx swit ch t i me tb d us ec channel change time 200 usec up to 1mhz frequency step dc specifications parameter min ty p. max units notes supply voltage 2.1 3.0 3. 6 v d c o p e r a t i n g l i m i t s receive current consumption 9.6 96 ma ua continuous operation polled operation transmit current consumption po= -20 dbm po= -5 dbm po= 0 dbm po= 5 dbm 8.6 13.8 16.5 25.4 ma ma ma ma output into 50 ohm load pll only current consumption 6 ma power down current consumption 0 . 2 t b d u a vih ? logic high level input vil ? logic low level input voh ? logic high level output vol ? logic low level output 0.7*vcc 0 2.5 0 v c c 0.3*vcc v cc .4 vdc vdc vdc vdc c:\radiotronix\data sheets\ewd-hdtc.doc - 4 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet circuit description if blo c k de m o d ln a mix e r re c e iv e c h ai n r x tx pl l 2 3 rss i co nt r o l ec l k ed a t ee pr o m ant p i n t r ans m it chai n lo figure 2 ew d-hdtc internal block diagram a sim p lified block diagram of the ew d-hdtc m odule is shown in figure 2. the m odule contains an internal antenna switch, and can operate in one of four m odes: tx, rx, sleep, and shutdown. in transm it m ode, the local oscillator (lo) is switched to the power am p (pa), generating the transm it carrier. the pll provides closed-loop frequency control of the carrier. the incom i ng data stream is used to frequency m odulate the carrier. modulation is precisely controlled by the pll by switching between two reference frequencies corresponding to the two possible states of the data input line. data can be transm itted in nrz or manchester f o rm . the control block contains a built-in manchester encoder, sim p lif ying the requirem e nts of the external m i crocontroller. in receive m ode, the m odule operates like a traditional super heterodyne receiver. the lo is switched to the receive m i xer in order to down convert the incom i ng rf signal to a 150 khz interm ediate frequency. the if block am plifies and filters the down converted signal in preparation for dem odulation. clock extraction and synchronization is perform e d on the dem odulated data by the control block. the receiver supports nrz and manchester encoded data. the on-board pll allows fine-frequency adjustm e nts to be m a de to the carrier frequency, elim inating the need for on-board trim m e r capacitors and tem p erature controlled crystal oscillators. c:\radiotronix\data sheets\ewd-hdtc.doc - 5 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet a unique feature of the m odule is the on-board eeprom. the eeprom contains a unique 32-bit serial num ber and calibration data. the calibration data is used to correct for frequency errors generated by the crystal and by tem p erature deviation from 25 degrees c. for m o re inform ation on using inform ation from the eeprom, please refer to ?ew d -hdtc user?s manual?. the ew d-hdtc provides a very sim p le m i crocontroller interface. the m odule is program m e d by a 3-wire serial interface, and data is sent and received to and from the m odule using a 2-wire serial interface. the rssi pin provides an analog voltage that is proportional to the incom i ng received signal in db. program m i ng the ew d-hdtc is very sim p le. w e provide a com p lete api for m o st m i crocontrollers that is written in c. for details on the api please ref e r to ?ew d -hdtc user?s manual?. c:\radiotronix\data sheets\ewd-hdtc.doc - 6 - 1/11/2003
ewd-900-hdtc 128 channel f sk da ta transceiver data sheet example application circuit c:\radiotronix\data sheets\ewd-hdtc.doc - 7 - 1/11/2003
ewd-900-hdtc 128 channel fsk da ta transceiver data sheet c:\radiotronix\data sheets\ewd-hdtc.doc - 8 - 1/11/2003 related documentation x ewd-hdtc user?s guide (available november 21, 2002) ordering information product order code ewd-900-hdtc 100-900-06a

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